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rocm: model weights in host RAM on integrated APUs (Strix Halo) #1028

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rocm: model weights in host RAM on integrated APUs (Strix Halo) #1028

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17 changes: 17 additions & 0 deletions ds4_rocm_memory.h
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Original file line number Diff line number Diff line change
Expand Up @@ -59,4 +59,21 @@ static inline hipError_t ds4_rocm_mem_get_info(size_t *free_b, size_t *total_b)
return hipSuccess;
}


static inline hipError_t ds4_rocm_weights_alloc(void **ptr, size_t bytes) {
/* Integrated APUs (Strix Halo) expose a small device pool (BIOS UMA
* frame buffer, ~62 GiB). Model weights are better placed in host RAM,
* which is GPU-visible on UMA systems, mirroring llama.cpp GGML_HIP_UMA.
* DS4_ROCM_FORCE_DEVICE_MEM restores the old behavior. */
if (!getenv("DS4_ROCM_FORCE_DEVICE_MEM") && ds4_rocm_uses_host_ram()) {
if (ds4_rocm_allocation_fits(bytes, true)) {
hipError_t err = hipHostMalloc(ptr, bytes);
if (err == hipSuccess) return err;
err = hipMallocManaged(ptr, bytes);
if (err == hipSuccess) return err;
}
}
return hipMalloc(ptr, bytes);
}

#endif
6 changes: 3 additions & 3 deletions rocm/ds4_rocm_runtime.cuh
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Expand Up @@ -5558,18 +5558,18 @@ static char *cuda_model_arena_alloc(uint64_t bytes, const char *what) {

const uint64_t chunk = ds4_rocm_model_arena_bytes(aligned);
void *dev = NULL;
cudaError_t err = cudaMalloc(&dev, (size_t)chunk);
cudaError_t err = ds4_rocm_weights_alloc(&dev, (size_t)chunk);
if (err != cudaSuccess) {
(void)cudaGetLastError();
uint64_t fallback = chunk / 2u;
while (fallback >= aligned) {
err = cudaMalloc(&dev, (size_t)fallback);
err = ds4_rocm_weights_alloc(&dev, (size_t)fallback);
if (err == cudaSuccess) break;
(void)cudaGetLastError();
fallback /= 2u;
}
if (err != cudaSuccess) {
err = cudaMalloc(&dev, (size_t)aligned);
err = ds4_rocm_weights_alloc(&dev, (size_t)aligned);
if (err != cudaSuccess) {
fprintf(stderr,
DS4_GPU_LOG_PREFIX "model arena alloc failed for %s "
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