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bee9b16
First draft of axi-stream frame buffer
burbschat May 2, 2026
f930d77
Add basic testbed for axiStreamFrameBuffer
burbschat May 2, 2026
7e95622
Simulate (with tb) and fix axiStreamFrameBuffer
burbschat May 2, 2026
03be05f
Simulate axiStreamFrameBuffer with async clocks
burbschat May 2, 2026
a3b3362
Allow disabling of safe buffering (less resources)
burbschat May 2, 2026
05904a7
Resolve some TODOs and add further notes
burbschat May 2, 2026
c31eece
Cleanup some comments and formatting
burbschat May 2, 2026
1096609
Fix missing dataFrameRxDone strobe reset
burbschat May 2, 2026
32f7d00
Fix not supported generate else syntax
burbschat May 2, 2026
3cb150e
Add rogue device class for axiStreamFrameBuffer
burbschat May 3, 2026
9e838c7
Switch to oneshot synchronizer for trigger
burbschat May 5, 2026
4c0f5a0
Use surf, not work library for synchronizers
burbschat May 12, 2026
6efb041
Properly resolve synchronizer issues
burbschat May 12, 2026
fc59cf9
Fix wrong clock options for AxiStreamFrameBufferTb
burbschat May 13, 2026
6f30086
Add cocotb test for AxiStreamFrameBuffer
burbschat May 13, 2026
59f5424
Remove todo comment
burbschat May 13, 2026
9b0abef
Add some more notes describing functionality
burbschat May 13, 2026
689a091
Use shiftwidth 4 -> 3 for AxiStreamFrameBufferTb
burbschat May 13, 2026
68d889d
Add comment on empty buffer edge case
burbschat May 13, 2026
4fa18d6
Remove remaining TODO comments
burbschat May 13, 2026
7aeec8b
Fix wrong clock for axil->data synchronizer
burbschat May 21, 2026
4a721b7
Fix data process returning to idle too early
burbschat May 21, 2026
c6ccde7
Fix wrong reset signal in IP integrator wrapper
burbschat May 21, 2026
eff7018
Modify tests to cover async/sync safe/unsafe buffs
burbschat May 21, 2026
c94d3ad
fix(jesd204b): correct 0x24 rxPowerDown read/write action swap in Jes…
ruck314 Jun 5, 2026
c03ceb2
fix(jesd204b): zero rdata in JesdTxReg read decode to prevent stale r…
ruck314 Jun 5, 2026
33118a0
feat(jesd204b): emit ILAS /Q/ and link-configuration octets in second…
ruck314 Jun 5, 2026
567dfe8
chore(jesd204b): remove dead jesdScrambler procedure and fix stale co…
ruck314 Jun 5, 2026
9c873b0
test(jesd204b): add cocotb test suite, simulation wrappers, and rucku…
ruck314 Jun 5, 2026
69fcca5
Merge branch 'pre-release' into axiStreamFrameBuffer
bengineerd Jun 8, 2026
07b2295
Automatically reset softTrig back to '0'
burbschat Jun 9, 2026
9194315
Apply formatting guidelines
burbschat Jun 9, 2026
fffe3e8
Add test case for the software trigger
burbschat Jun 9, 2026
51797aa
Add Flex BMR467 PMBus PoL regulator device driver
ruck314 Jun 16, 2026
43a275c
Merge pull request #1439 from slaclab/flex-BMR467
ruck314 Jun 16, 2026
83de682
Merge branch 'pre-release' into jesd-ci-testing-pr
ruck314 Jun 17, 2026
f18220b
feat(IpV4Engine/UdpEngine): runtime ECN/DSCP IP-header register
ruck314 Jun 25, 2026
256489d
feat(AxiStream): rework AxiStreamCompact and add AxiStreamMon frameUp…
ruck314 Jun 25, 2026
800ac65
feat(RoCEv2): regenerate blue-rdma transport engine for line-rate RDM…
ruck314 Jun 25, 2026
cb558fa
feat(RoCEv2): AXI-Stream RDMA datapath, engine refactor, and RoCEv2 r…
ruck314 Jun 25, 2026
052db87
feat(RoCEv2): DCQCN congestion control with runtime bypass
ruck314 Jun 25, 2026
5cf55c4
test(RoCEv2): add AxiStreamRdmaCore + Dcqcn cocotb benches, wrappers,…
ruck314 Jun 25, 2026
dcc0155
Merge branch 'pre-release' into dcqcnEn
ruck314 Jun 25, 2026
e72b06b
Use newline delimiter in Si5394/Si5345 CSV-to-MEM scripts for Vivado …
ruck314 Jun 25, 2026
e648f9b
Merge pull request #1440 from slaclab/vivado-2026.1-CsvToMem-update
ruck314 Jun 25, 2026
57fe50d
Add tUserFirst alignment checking to AxiStreamBatcherEventBuilder
ruck314 Jun 28, 2026
8d3ec22
Exclude NULL frames from EventBuilder tUserFirst alignment check
ruck314 Jun 29, 2026
b69f41d
Refactor RAM entity instantiations to unify synthesis mode handling a…
bengineerd Jul 1, 2026
d1fb791
Add inferred TrueDualPortRam implementation and update test cases for…
bengineerd Jul 1, 2026
539ead2
Add support for per-port read latency in TrueDualPortRam implementation.
bengineerd Jul 1, 2026
33c1322
Add assertions for RST_ASYNC_G and DOA_REG_G in TrueDualPortRam; enha…
bengineerd Jul 1, 2026
51c6da8
Refactor RAM instantiation in AxiLiteSequencerRam to unify read laten…
bengineerd Jul 1, 2026
8918392
Enhance AxiDualPortRam with improved read latency handling and update…
bengineerd Jul 1, 2026
da93578
Update AxiDualPortRam and README files for clarity on RAM implementat…
bengineerd Jul 1, 2026
4bda84b
Add helper function to generate simulation build suffix for parameters.
bengineerd Jul 1, 2026
36e3e0d
Address RAM selector review feedback
bengineerd Jul 1, 2026
b9a2b21
htsp: parameterize HtspRxFifo/HtspTxFifo application AXI-Stream width
ruck314 Jul 1, 2026
e610f56
fix(AxiStream/UdpEngine): address RoCEv2 PR review feedback
ruck314 Jul 1, 2026
39cd4cf
Merge branch 'pre-release' into dcqcnEn
ruck314 Jul 1, 2026
142903a
fix(UdpEngine): move ECN/DSCP out of localMac word bits
ruck314 Jul 2, 2026
c21e445
Skip EventBuilder tUserFirst alignment check when reference source is…
ruck314 Jul 2, 2026
a1e7f96
fix(jesd204b): advertise link lane count (L_G-1) in ILAS octet-3
ruck314 Jul 2, 2026
29d6ae1
test(jesd204b): validate multi-lane ILAS, fix cocotb selection, dedup…
ruck314 Jul 2, 2026
64f1b9f
Remove logic in port assignment
burbschat Jul 2, 2026
1a66184
Fix wrong reset signal used in testbed
burbschat Jul 2, 2026
98bc7df
Treat edge case trigger but still empty buffer
burbschat Jul 2, 2026
2b2d504
test(jesd204b): enable filtered loopback tests
bengineerd Jul 2, 2026
58ec4c2
test(jesd204b): rely on imported wrapper sources
bengineerd Jul 2, 2026
6383c47
Merge pull request #1443 from slaclab/ram-synth-mode
bengineerd Jul 2, 2026
37068b7
Merge branch 'pre-release' into jesd-ci-testing-pr
bengineerd Jul 2, 2026
ca4b86e
Merge branch 'jesd-ci-testing-pr' of https://github.com/slaclab/surf …
bengineerd Jul 2, 2026
b72f1e0
Remove sim_build_key from multiple test files
bengineerd Jul 2, 2026
ab5c299
Merge branch 'pre-release' into EventBuilder-tUserFirst-align-checker
ruck314 Jul 2, 2026
89428eb
Merge pull request #1432 from slaclab/jesd-ci-testing-pr
ruck314 Jul 2, 2026
6d2e938
Merge branch 'pre-release' into EventBuilder-tUserFirst-align-checker
ruck314 Jul 2, 2026
c49eee7
Merge pull request #1442 from slaclab/EventBuilder-tUserFirst-align-c…
ruck314 Jul 2, 2026
793be31
Add tDest and tId handling in AxiStreamCompact and tests
bengineerd Jul 2, 2026
1a23e74
Update GEN_SYNC_FIFO_G comment for clarity and add note on gearbox usage
bengineerd Jul 2, 2026
b8f20f2
Merge branch 'pre-release' into HtspRxFifo-HtspTxFifo
ruck314 Jul 2, 2026
de1b236
Merge pull request #1444 from slaclab/HtspRxFifo-HtspTxFifo
ruck314 Jul 2, 2026
d4795fb
feat(dep_map): add change-aware GHDL/cocotb CI test selection
ruck314 Jul 3, 2026
a808693
Restrict RAM_ADDR_WIDTH_G and adjust registers
burbschat Jul 6, 2026
39048ce
Merge branch 'pre-release' into dcqcnEn
ruck314 Jul 6, 2026
754102f
Merge pull request #1430 from slaclab/dcqcnEn
ruck314 Jul 6, 2026
e942ed8
Merge branch 'pre-release' into axiStreamFrameBuffer
ruck314 Jul 6, 2026
b71021c
Merge pull request #1418 from burbschat/axiStreamFrameBuffer
ruck314 Jul 6, 2026
d713973
fix(axi-stream): drop numpy dependency from AxiStreamFrameBuffer test
ruck314 Jul 6, 2026
50caf08
Merge pull request #1451 from slaclab/test_AxiStreamFrameBuffer-fix-ci
ruck314 Jul 6, 2026
93567d6
Add comprehensive tests for RSSI functionality and enhance SSI test u…
bengineerd Jul 7, 2026
e1738a2
ci: upgrade and pin GitHub Actions to commit SHAs
ruck314 Jul 7, 2026
608f4d7
Merge pull request #1459 from slaclab/maint/repo-hygiene-2026
ruck314 Jul 7, 2026
f145a96
Merge branch 'pre-release' into rssi-regression-foundation
bengineerd Jul 7, 2026
6e3a8cf
Fix BOOTP broadcast flag in UdpEngineDhcp (0x0800 -> 0x8000)
ruck314 Jul 7, 2026
190315a
test: assert exact BOOTP flags value (0x8000) instead of bitmask
ruck314 Jul 7, 2026
c227018
Documentation enhancements.
bengineerd Jul 7, 2026
6198c3d
Documentation clarification.
bengineerd Jul 7, 2026
b6035da
Merge branch 'pre-release' into fix/dhcp-broadcast-flag
ruck314 Jul 7, 2026
911cd4c
test: add DHCP corner-case coverage (xid/chaddr rejection, option ord…
ruck314 Jul 7, 2026
fe3d9e3
Preserve XID across Discover->Request per RFC 2131 4.4.1
ruck314 Jul 7, 2026
c540eb7
ci: run UdpEngine DHCP regression tests
ruck314 Jul 7, 2026
b25d9fa
Merge pull request #1453 from slaclab/rssi-regression-foundation
bengineerd Jul 8, 2026
a51bd3e
Merge branch 'pre-release' into fix/dhcp-broadcast-flag
ruck314 Jul 13, 2026
5cfbd9c
Merge pull request #1460 from slaclab/fix/dhcp-broadcast-flag
ruck314 Jul 13, 2026
774f129
ci: replace dependency graph with directory selector
bengineerd Aug 3, 2026
d923e70
Merge remote-tracking branch 'origin/pre-release' into ci-test-cherry…
bengineerd Aug 3, 2026
3cf0f40
ci: add manual selective-run validation
bengineerd Aug 3, 2026
ada6414
ci: isolate manual validation concurrency
bengineerd Aug 3, 2026
f4435c1
ci: discover directory-owned regression suites
bengineerd Aug 3, 2026
c71537c
fix: replace non-ASCII characters in VHDL comments
ruck314 Aug 4, 2026
5013132
Merge pull request #1464 from slaclab/genus-bug-fixes
ruck314 Aug 4, 2026
d0f7010
docs: record directory-scoped CI policy
bengineerd Aug 6, 2026
26b3cb7
docs: clarify full CI and coverage scope
bengineerd Aug 6, 2026
1c468ba
ci: force full runs for shared protocol cores
bengineerd Aug 6, 2026
596ebd7
docs: remove directory CI review notes
bengineerd Aug 6, 2026
dcf0ef2
ci: skip release workflows outside tag builds
bengineerd Aug 6, 2026
5108fe0
Merge branch 'pre-release' into ci-test-cherry-pick-using-GHDL-cf-file
ruck314 Aug 7, 2026
7af5239
Merge pull request #1449 from slaclab/ci-test-cherry-pick-using-GHDL-…
ruck314 Aug 7, 2026
11930fb
chore: bump ruckus lock to 4.30.1 and add ZeroMQ simulation dependencies
bengineerd Aug 11, 2026
a8d6fc2
refactor(simlink): promote SimLink to a top-level module with a share…
bengineerd Aug 11, 2026
71f0c5d
feat(simlink): add the GHDL VHPIDIRECT backend
bengineerd Aug 11, 2026
357672d
feat(simlink): add the Vivado xsim DPI-C backend
bengineerd Aug 11, 2026
2155e83
test(simlink): add HDL harnesses and testbenches for the SimLink back…
bengineerd Aug 11, 2026
56f3991
docs(simlink): add SimLink user and architecture documentation
bengineerd Aug 11, 2026
6fa2c5c
test(simlink): add the shared SimLink pytest infrastructure
bengineerd Aug 11, 2026
9acd62b
test(simlink): add GHDL and native-adapter regression suites
bengineerd Aug 11, 2026
2632ffe
test(simlink): add VCS and Vivado xsim regression suites
bengineerd Aug 11, 2026
d35f367
test(simlink): add real-Rogue client contract tests
bengineerd Aug 11, 2026
cde56cb
test(simlink): add layered test runner scripts
bengineerd Aug 11, 2026
6ff5f89
ci: run the SimLink suite as a dedicated bounded step
bengineerd Aug 11, 2026
01c9366
test(jesd204b): load cocotb wrappers via extra_vhdl_sources
bengineerd Aug 11, 2026
6214b77
docs: record the SimLink alignment plans and findings
bengineerd Aug 11, 2026
26a0e0b
test(simlink): fix three races in the SimLink regression harness
ruck314 Aug 11, 2026
6075642
test(simlink): close the peer PUSH slow-joiner drop window
ruck314 Aug 11, 2026
c115309
run-vcs.sh: run the whole vcs/ directory, not one hardcoded test
bengineerd Aug 13, 2026
7284e2d
Remove planning docs.
bengineerd Aug 14, 2026
7f75551
Merge pull request #1463 from slaclab/simlink-alignment
bengineerd Aug 14, 2026
8b774d2
refactor(devices): remove Micron DDR3/DDR4 Verilog simulation models
ruck314 Aug 17, 2026
f9b99ef
refactor(saci): remove unused SaciSlaveAnalog.v simulation model
ruck314 Aug 17, 2026
78efe54
refactor(xvc-udp): remove generated UdpDebugBridge Verilog stubs
ruck314 Aug 17, 2026
ec31c97
Merge pull request #1469 from slaclab/verilog-removal
ruck314 Aug 17, 2026
6f8099d
fix(GtRxAlignCheck): synchronize the reset handshake into axilClk
ruck314 Aug 18, 2026
6432d4b
fix(GtRxAlignCheck): bound the sample index from the 7-bit DRP field
ruck314 Aug 18, 2026
5161363
fix(GtRxAlignCheck): saturate retryCnt instead of rolling over
ruck314 Aug 18, 2026
b30a63e
docs(GtRxAlignCheck): document the 0x100 write side effect
ruck314 Aug 18, 2026
5b2d27d
test(GtRxAlignCheck): add cocotb regression and include the module in…
ruck314 Aug 18, 2026
10f0d85
Merge pull request #1470 from slaclab/GtRxAlignCheck-dev
ruck314 Aug 19, 2026
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201 changes: 189 additions & 12 deletions .github/workflows/surf_ci.yml
Original file line number Diff line number Diff line change
Expand Up @@ -14,9 +14,32 @@
# secrets.CONDA_UPLOAD_TOKEN_TAG

name: CI
on: [push]
# Triggers: every push runs the workflow (directory-scoped regression on
# feature branches, full on pre-release/main/tags); PRs into main additionally
# run it in full.
# A feature branch with an open PR into main therefore runs the regression
# job twice per push -- once selective (push ref) and once full (PR merge
# ref). Distinct event/ref concurrency groups prevent push, PR, and manual
# validation runs from cancelling one another. This is intentional: the push
# run gives fast per-commit feedback and the PR run is the full pre-merge
# release gate. In this repo feature branches normally target pre-release, so
# the double run is confined to release PRs. The post-merge push to pre-release
# is also full so the integration branch is checked after every feature merge.
# Manual dispatch can simulate a changed-path list to exercise selective
# execution on a runner; it does not alter the path source used by push or
# pull-request events.
on:
push:
pull_request:
branches: [ main ]
workflow_dispatch:
inputs:
changed_files_override:
description: Comma-separated paths used to exercise selective CI without changing push/PR policy
required: false
type: string
concurrency:
group: ${{ github.workflow }}-${{ github.ref }}
group: ${{ github.workflow }}-${{ github.event_name }}-${{ github.ref }}
cancel-in-progress: true

jobs:
Expand All @@ -27,9 +50,9 @@ jobs:
runs-on: ubuntu-24.04

steps:
- uses: actions/checkout@v4
- uses: actions/checkout@9c091bb21b7c1c1d1991bb908d89e4e9dddfe3e0 # v7.0.0

- uses: actions/setup-python@v5
- uses: actions/setup-python@ece7cb06caefa5fff74198d8649806c4678c61a1 # v6.3.0
with:
python-version: 3.12

Expand Down Expand Up @@ -60,6 +83,13 @@ jobs:
exit 1
fi

- name: Check for non-ASCII characters in VHDL
run: |
if LC_ALL=C grep -rnP '[^\x00-\x7F]' --include=\*.vhd .; then
echo "Error: Non-ASCII characters found in VHDL source! Some tools (e.g. Cadence Genus) read VHDL with an ASCII codec and will fail. Please use plain ASCII (e.g. '-' instead of en/em dashes)."
exit 1
fi

- name: Python Linter Checking
run: |
python -m compileall -f python/ scripts/ tests/
Expand All @@ -83,16 +113,18 @@ jobs:
runs-on: ubuntu-24.04

steps:
- uses: actions/checkout@v4
- uses: actions/checkout@9c091bb21b7c1c1d1991bb908d89e4e9dddfe3e0 # v7.0.0
with:
fetch-depth: 0

- uses: actions/setup-python@v5
- uses: actions/setup-python@ece7cb06caefa5fff74198d8649806c4678c61a1 # v6.3.0
with:
python-version: 3.12

- name: Install dependencies
run: |
sudo apt-get update
sudo apt-get install -y make python3 python3-pip tclsh ghdl
sudo apt-get install -y make python3 python3-pip tclsh ghdl libzmq3-dev valgrind
python -m pip install --upgrade pip
python -m pip install -r pip_requirements.txt
if [ -L ruckus ] && [ ! -d ruckus ]; then
Expand All @@ -104,24 +136,167 @@ jobs:
fi
python -m pip install -r ruckus/scripts/pip_requirements.txt

- name: Determine run mode
id: mode
run: |
if [[ "${{ github.event_name }}" == "pull_request" ]] \
|| [[ "${{ github.ref }}" == "refs/heads/main" ]] \
|| [[ "${{ github.ref }}" == "refs/heads/pre-release" ]] \
|| [[ "${{ github.ref }}" == refs/tags/* ]]; then
echo "value=full" >> "$GITHUB_OUTPUT"
else
echo "value=selective" >> "$GITHUB_OUTPUT"
fi

- name: Parallel Regression Tests
env:
CHANGED_FILES_OVERRIDE: ${{ inputs.changed_files_override }}
run: |
# Define the full regression universe once so integration runs and
# selective-mode fallbacks cannot drift apart as suites are added.
full_targets=(
tests
)
# tests/simlink is owned by the dedicated step below, which runs it
# on every push with a bounded worker count. Exclude it here so the
# unbounded -n auto never starves its multi-instance peer handshake
# and so the suite is not run twice.
full_ignores=(
--ignore=tests/simlink
)

# Full integration/release runs build and simulate on apt mcode GHDL
# and collect the coverage consumed by Codecov.
if [[ "${{ steps.mode.outputs.value }}" == "full" ]]; then
make MODULES=$PWD import
python -m pytest --cov -v -n auto --dist=worksteal "${full_ignores[@]}" "${full_targets[@]}"
exit 0
fi

# Feature-branch pushes compare with origin/pre-release and map
# localized protocol/DSP/Ethernet paths to matching pytest
# directories. Any foundational, build-control, deleted/renamed,
# unknown, or otherwise indeterminate change emits FORCE_FULL.
selector_args=()
selection_source="git diff against origin/pre-release"
if [[ "${{ github.event_name }}" == "workflow_dispatch" ]] \
&& [[ -n "${CHANGED_FILES_OVERRIDE}" ]]; then
selector_args+=(--changed-files-override "${CHANGED_FILES_OVERRIDE}")
selection_source="manual changed-path simulation"
fi

if selector_output="$(python -m tests.common "${selector_args[@]}")"; then
selector_rc=0
else
selector_rc=$?
fi

echo "${selector_output}"
make MODULES=$PWD import
python -m pytest --cov -v -n auto --dist=worksteal tests/axi tests/base tests/dsp tests/protocols

if [[ "${selector_rc}" -ne 0 ]] || grep -qx "FORCE_FULL" <<< "${selector_output}"; then
echo "Directory selector forced a full run (rc=${selector_rc})"
{
echo "### Regression selection"
echo
echo "- Source: ${selection_source}"
echo "- Result: full regression"
} >> "${GITHUB_STEP_SUMMARY}"
python -m pytest -v -n auto --dist=worksteal "${full_ignores[@]}" "${full_targets[@]}"
else
# tests/common contains the selector's policy tests and always runs
# alongside any directory-owned cocotb targets.
targets=(tests/common)
if [[ -n "${selector_output}" ]]; then
mapfile -t selected < <(printf '%s\n' "${selector_output}")
targets+=("${selected[@]}")
else
echo "No directory-owned cocotb tests for this change set -- running tests/common only."
fi
{
echo "### Regression selection"
echo
echo "- Source: ${selection_source}"
echo "- Result: selective regression"
echo "- Pytest targets: \`${targets[*]}\`"
} >> "${GITHUB_STEP_SUMMARY}"
python -m pytest -v -n auto --dist=worksteal "${targets[@]}"
fi

- name: SimLink Regression Tests
# SimLink runs in its own step with a bounded worker count, and is
# excluded from the step above in both full and selective mode. Its
# native ctypes libraries and the multi-instance ZeroMQ traffic test are
# timing-sensitive, and an unbounded -n auto on a many-core runner
# over-subscribes badly enough to starve the multi-instance peer
# handshake. Cap workers at min(nproc, 8): still ~2x faster than serial
# on the hosted 4-core runner, without the high-concurrency starvation.
# Unconditional: the path selector maps no path to tests/simlink, so a
# selective feature-branch push would otherwise never exercise it.
run: |
python -m pytest --cov --cov-append -v \
-n "$(python -c 'import os; print(min(os.cpu_count() or 1, 8))')" \
--dist=worksteal tests/simlink

- name: Code Coverage
if: steps.mode.outputs.value == 'full'
run: |
codecov
coverage report -m

# ----------------------------------------------------------------------------

simlink_rogue:
name: SimLink Rogue Contract
runs-on: ubuntu-24.04
timeout-minutes: 30
defaults:
run:
shell: bash -el {0}

steps:
- uses: actions/checkout@9c091bb21b7c1c1d1991bb908d89e4e9dddfe3e0 # v7.0.0

- name: Setup Miniforge
uses: conda-incubator/setup-miniconda@8ee1f361103df19b6f8c8655fd3967a8ecb162d5 # v4.0.1
with:
miniforge-variant: Miniforge3
miniforge-version: latest
activate-environment: surf-simlink-rogue
environment-file: tests/simlink/rogue/conda.yml
auto-activate: false
conda-remove-defaults: true

- name: Install dependencies
run: |
sudo apt-get update
sudo apt-get install -y make tclsh ghdl pkg-config libzmq3-dev
python -m pip install --upgrade pip
python -m pip install -r pip_requirements.txt
if [ -L ruckus ] && [ ! -d ruckus ]; then
echo "Removing broken ruckus symlink from checkout"
rm ruckus
fi
if [ ! -d ruckus ]; then
git clone https://github.com/slaclab/ruckus.git ruckus
fi
python -m pip install -r ruckus/scripts/pip_requirements.txt

- name: Run production Rogue SimLink contract
run: |
python -c "import rogue, pyrogue; print(rogue.Version.current())"
make MODULES="$PWD" import
SIMLINK_ROGUE_PYTHON="$(command -v python)" \
python -m pytest -q -n 0 tests/simlink/rogue/test_RogueTcpMemoryRogue.py

# ----------------------------------------------------------------------------

docs:
name: Documentation
runs-on: ubuntu-24.04

steps:
- uses: actions/checkout@v4
- uses: actions/checkout@9c091bb21b7c1c1d1991bb908d89e4e9dddfe3e0 # v7.0.0

- name: Install documentation tools
run: |
Expand All @@ -134,15 +309,16 @@ jobs:

- name: Deploy Documentation
if: startsWith(github.ref, 'refs/tags/')
uses: peaceiris/actions-gh-pages@v3
uses: peaceiris/actions-gh-pages@84c30a85c19949d7eee79c4ff27748b70285e453 # v4.1.0
with:
github_token: ${{ secrets.GH_TOKEN }}
publish_dir: doxygen/html

# ----------------------------------------------------------------------------

gen_release:
needs: [lint, test, docs]
needs: [lint, test, simlink_rogue, docs]
if: startsWith(github.ref, 'refs/tags/')
uses: slaclab/ruckus/.github/workflows/gen_release.yml@main
with:
version: '1.0.0'
Expand All @@ -152,7 +328,8 @@ jobs:
# ----------------------------------------------------------------------------

conda_build_lib:
needs: [lint, test, docs]
needs: [lint, test, simlink_rogue, docs]
if: startsWith(github.ref, 'refs/tags/')
uses: slaclab/ruckus/.github/workflows/conda_build_lib.yml@main
with:
version: '1.0.0'
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19 changes: 18 additions & 1 deletion .gitignore
Original file line number Diff line number Diff line change
Expand Up @@ -18,9 +18,19 @@ ghdl-build/
ruckus
ruckus/
build/
sim_build/
sim_build*
xsc.pb
.coverage*

# SimLink simulator-local build state
/simlink/vcs/.obj/
/simlink/vcs/.pytest-build.lock
/simlink/xsim/.Xil/
/simlink/xsim/xsim.dir/
/simlink/xsim/xsc.jou
/simlink/xsim/xelab.jou
/simlink/xsim/xelab.pb

# Local editor/agent state
.vscode/
.cursor/
Expand All @@ -29,3 +39,10 @@ sim_build/
planning/
CLAUDE.md
.DS_Store
.venv/
work/
*.orig
base/general/proj/
*/xsim.dir/*
base/vhdl-libs/*
tests/simlink/env.local.sh
3 changes: 2 additions & 1 deletion README.md
Original file line number Diff line number Diff line change
Expand Up @@ -9,12 +9,13 @@ SLAC Ultimate RTL Framework
# Repository Map

- [Agent guidance](AGENTS.md): project layout, coding conventions, and verification notes for contributors and coding agents.
- [AXI](axi/README.md): AXI-Lite, AXI4, AXI Stream, DMA, bridges, and simulation-link RTL.
- [AXI](axi/README.md): AXI-Lite, AXI4, AXI Stream, DMA, and bridges.
- [Base](base/README.md): foundational packages, CDC, FIFO, RAM, reset, delay, CRC, and generic RTL helpers.
- [Devices](devices/README.md): vendor and component-specific RTL support.
- [DSP](dsp/README.md): generic and Xilinx-specific DSP support.
- [Ethernet](ethernet/README.md): MAC, raw Ethernet, IPv4, UDP, RoCEv2, and high-speed Ethernet cores.
- [Protocols](protocols/README.md): PGP, SSI, SRP, RSSI, CoaXPress, JESD204B, peripheral buses, and related protocol cores.
- [SimLink](simlink/README.md): setup and reference documentation for Rogue-facing Stream, Memory, and SideBand simulation links with GHDL, VCS, or Vivado xsim.
- [Xilinx](xilinx/README.md): Xilinx-family wrappers, primitive integrations, and XVC UDP support.
- [Python](python/README.md): PyRogue package layout under `python/surf`.
- [Tests](tests/README.md): cocotb regression layout, methodology, helpers, and simulator conventions.
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1 change: 0 additions & 1 deletion axi/README.md
Original file line number Diff line number Diff line change
Expand Up @@ -9,6 +9,5 @@ This tree contains reusable AXI-family RTL and wrappers. Top-level `axi/ruckus.t
- `axi4/`: full AXI4 support blocks and adapters.
- `bridge/`: bridges between AXI-family buses and SURF protocol records.
- `dma/`: DMA register, descriptor, FIFO, and stream integration cores.
- `simlink/`: simulator-link support and C/C++/VHDL pieces used by simulation flows.

Use existing package record types before adding flattened ports. Put durable adapter entities in `ip_integrator/` or `wrappers/`, and keep executable cocotb tests under `tests/axi/`.
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