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This repository was archived by the owner on Apr 18, 2025. It is now read-only.
some circuits (eg bytecode circuit), will ignore assignment after "row limit". So constrain failures will happend.
We'd better report Err::Systhesis early? At least for bytecode circuit / evm circuit / copy circuit, which are the bottleneck, and mostly likely encounter overflow.
(It is not about overflow 1<<28, but overflow of the "pre-set row limit", eg 0.6M for bytecode circuit)
Describe the feature you would like
some circuits (eg bytecode circuit), will ignore assignment after "row limit". So constrain failures will happend.
We'd better report Err::Systhesis early? At least for bytecode circuit / evm circuit / copy circuit, which are the bottleneck, and mostly likely encounter overflow.
(It is not about overflow 1<<28, but overflow of the "pre-set row limit", eg 0.6M for bytecode circuit)
(not of high priority)
Additional context
No response