[asteinh]

Reruns the Cortex-M and ESP32-S3 suites on compiler f64f57d (schema 9) and runtime ccec237.

• Both ESP32-S3 projects move to esp-nn 1.4 (TiGrIS and TFLM keep sharing one esp-nn); releases below 1.3 miscompute the mult8 1x1 convolution on some channel counts.
• The ESP32-S3 TiGrIS cells now build the runtime at TIGRIS_RUNTIME_ROOT, the checkout the version check verifies, instead of the sibling directory.
• Cortex-M: 27 cells, device-to-device parity 0 LSB throughout. CMSIS-NN latencies within 1% of the previous run except RP2350 ts (+8%); s8_ref cells 10 to 27% faster.
• ESP32-S3: MobileNetV1 39 to 50% faster (7% at 32K), U-Net 8% faster, DS-CNN on ESP-NN unchanged at 29.3 ms. TFLM DS-CNN dropped to 23.3 ms on esp-nn 1.4, so the headline table no longer claims parity.
• The README-contract test derives its mutated row from the summary instead of a literal tied to one run.