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[ARM] Implement R_ARM_LDC_PC_G1 relocation - #2069
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Deepak Shirke (deepakshirkem) wants to merge 2 commits into
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Deepak Shirke (deepakshirkem) wants to merge 2 commits into
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R_ARM_LDC_PC_G0 was previously unsupported. Add a shared LDC PC-group relocation handler with group 0 selection. The relocation computes S + A - P, selects the G0 residual, encodes the sign in U, and encodes the scaled 8-bit immediate, reporting overflow when the selected residual does not fit the supported range. Add standalone tests covering positive and negative PC-relative offsets and overflow handling, along with a runtime test using a VLDR PC-relative load. Update the ARM relocation documentation for R_ARM_LDC_PC_G0 support. Signed-off-by: deepakshirkem <deepakshirke509@gmail.com>
R_ARM_LDC_PC_G1 was previously unsupported. Reuse the shared LDC PC-group relocation handler with group 1 selection. The relocation computes S + A - P, derives the implicit addend from the U bit and scaled imm8 field, selects the G1 residual, and encodes the result back into the instruction. The residual must be 4-byte aligned and fit in the [0, 1023] range. Add standalone positive, negative, and overflow coverage, along with a runtime test using R_ARM_ALU_PC_G0_NC and R_ARM_LDC_PC_G1. Update the ARM relocation documentation to mark R_ARM_LDC_PC_G1 as supported. Signed-off-by: deepakshirkem <deepakshirke509@gmail.com>
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Once G0 lands, I’ll drop the G0 commit and rebase onto main for review. Thank you :)) |
Steven Ramirez Rosa (Steven6798)
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October 5, 2026 19:19
Steven Ramirez Rosa (Steven6798)
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Looks good. I'll review and approve as soon as the R_ARM_LDC_PC_G0 patch lands.
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R_ARM_LDC_PC_G1was previously mapped to the unsupported relocation handler. This change implements the relocation by reusing the shared LDC PC-group handler with group 1 selection.The relocation uses:
S + A - PU:imm8Ubit for the signimm8for the scaled 8-bit immediate[0, 1023]Fixes #2070
Part of #2001
CC: Steven Ramirez Rosa (@Steven6798)