Improvements ESP32 CDC/UART detection

targets/ESP32/_IDF/sdkconfig.default.esp32s2

@@ -48,6 +48,7 @@ CONFIG_FREERTOS_TIMER_TASK_PRIORITY=5
 CONFIG_FREERTOS_USE_TICKLESS_IDLE=y
 
 CONFIG_LOG_DEFAULT_LEVEL_NONE=y
+CONFIG_ESP_CONSOLE_UART_DEFAULT=y
 
 CONFIG_LWIP_LOCAL_HOSTNAME="nanodevice"
 CONFIG_LWIP_MAX_SOCKETS=16

targets/ESP32/_common/WireProtocol_HAL_Interface.c

@@ -10,6 +10,7 @@
 #include <WireProtocol_Message.h>
 #include <WireProtocol_HAL_Interface.h>
 #include <WireProtocol_Uart_Pins.h>
+#include <WireProtocol_Transport.h>
 
 #if CONFIG_TINYUSB_CDC_ENABLED
 #include <tinyusb.h>
@@ -22,9 +23,11 @@
 // USB/JTAG, and finally fallback to UART if the previous options are not available or fail to initialize. It can only
 // be USB CDC or USB/JTAG not both. The ESP will reset if tinyusb has been initialized/deinitialized then try USB/JTAG
 // as they use USB port in different modes
+// - ESP32-S2: TinyUSB CDC only (USB-OTG). No USB/JTAG peripheral, and no UART fallback is compiled.
+// - Other targets with USB-Serial/JTAG (C3/C5/C6/C61/H2/P4/S3): USB/JTAG first, then UART fallback.
+// - Targets without USB: UART only.
 
-// Only ESP32S2 uses TinyUSB (USB CDC)
-// Select between USB Jtag or UART based WP transport based on where connected and configuration
+// Only ESP32-S2 uses TinyUSB (USB CDC)
 #if CONFIG_IDF_TARGET_ESP32S2 && CONFIG_TINYUSB_CDC_ENABLED &&                                                         \
     (CONFIG_NF_WP_TRANSPORT_USB_CDC || CONFIG_NF_WP_TRANSPORT_USB_CDC_OR_SERIAL)
 #define WP_USE_TINYUSB
@@ -34,19 +37,14 @@
 #define WP_USE_USB_JTAG
 #endif
 
-#if (CONFIG_NF_WP_TRANSPORT_SERIAL || CONFIG_NF_WP_TRANSPORT_USB_CDC_OR_SERIAL)
+// UART fallback is skipped on S2 when TinyUSB is in use (see note above).
+#if (CONFIG_NF_WP_TRANSPORT_SERIAL || CONFIG_NF_WP_TRANSPORT_USB_CDC_OR_SERIAL) && !defined(WP_USE_TINYUSB)
 #define WP_USE_UART
 #endif
 
 // Select between USB Jtag or UART based WP transport based on where connected and configuration
 static bool WP_Port_Initialised = false;
-enum
-{
-    WP_TRANSPORT_NONE,
-    WP_TRANSPORT_UART,
-    WP_TRANSPORT_USB_JTAG,
-    WP_TRANSPORT_TINY_USB
-} WP_Transport = WP_TRANSPORT_NONE;
+WP_TransportType g_WP_Transport = WP_TRANSPORT_NONE;
 
 // WP using TinyUSB CDC
 #if defined(WP_USE_TINYUSB)
@@ -93,6 +91,8 @@ static bool WP_InitialiseTinyUsb(COM_HANDLE port)
 
     // delay for a while to allow the host to recognize the device and enumerate it
     // Also if no delay then the tinyusb_driver_uninstall() crashes
+#if defined(WP_USE_UART) || defined(WP_USE_USB_JTAG)
+    // Only probe destructively when a fallback transport is available.
     vTaskDelay(pdMS_TO_TICKS(100));
 
     // Check if the device is connected to host, if not, deinit and return false to fallback to other transport
@@ -102,6 +102,7 @@ static bool WP_InitialiseTinyUsb(COM_HANDLE port)
         tinyusb_driver_uninstall();
         return false;
     }
+#endif
 
     // TinyUSB CDC ACM is connected and ready to use
     WP_Port_Initialised = true;
@@ -385,15 +386,15 @@ static bool WP_Initialise(COM_HANDLE port)
 #if defined(WP_USE_TINYUSB)
     if (WP_InitialiseTinyUsb(port))
     {
-        WP_Transport = WP_TRANSPORT_TINY_USB;
+        g_WP_Transport = WP_TRANSPORT_TINY_USB;
         return true;
     }
 #endif
 
 #if defined(WP_USE_USB_JTAG)
     if (WP_InitialiseUsbJtag(port))
     {
-        WP_Transport = WP_TRANSPORT_USB_JTAG;
+        g_WP_Transport = WP_TRANSPORT_USB_JTAG;
         return true;
     }
 
@@ -402,12 +403,13 @@ static bool WP_Initialise(COM_HANDLE port)
 #if defined(WP_USE_UART)
     if (WP_InitialiseUart(port))
     {
-        WP_Transport = WP_TRANSPORT_UART;
+        g_WP_Transport = WP_TRANSPORT_UART;
         return true;
     }
 #endif
 
-    WP_Transport = WP_TRANSPORT_NONE;
+    g_WP_Transport = WP_TRANSPORT_NONE;
+
     return false;
 }
 
@@ -419,7 +421,7 @@ void WP_ReceiveBytes(uint8_t **ptr, uint32_t *size)
         WP_Initialise(ESP32_WP_UART);
     }
 
-    switch (WP_Transport)
+    switch (g_WP_Transport)
     {
         default:
         // No transport selected on startup
@@ -456,7 +458,7 @@ uint8_t WP_TransmitMessage(WP_Message *message)
         WP_Initialise(ESP32_WP_UART);
     }
 
-    switch (WP_Transport)
+    switch (g_WP_Transport)
     {
         default:
             // No transport selected on startup

targets/ESP32/_include/WireProtocol_Transport.h

@@ -0,0 +1,28 @@
+//
+// Copyright (c) .NET Foundation and Contributors
+// See LICENSE file in the project root for full license information.
+//
+
+#ifndef WIREPROTOCOL_TRANSPORT_H
+#define WIREPROTOCOL_TRANSPORT_H
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+    typedef enum
+    {
+        WP_TRANSPORT_NONE,
+        WP_TRANSPORT_UART,
+        WP_TRANSPORT_USB_JTAG,
+        WP_TRANSPORT_TINY_USB
+    } WP_TransportType;
+
+    extern WP_TransportType g_WP_Transport;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // WIREPROTOCOL_TRANSPORT_H

targets/ESP32/_nanoCLR/System.IO.Ports/sys_io_ser_native_System_IO_Ports_SerialPort.cpp

@@ -9,9 +9,7 @@
 #include <Esp32_DeviceMapping.h>
 #include <esp32_idf.h>
 #include <stdio.h>
-
-// Current transport being used for Wire protocol, defined in WireProtocol_HAL_Interface.c
-extern "C" enum { WP_TRANSPORT_NONE, WP_TRANSPORT_UART, WP_TRANSPORT_USB_JTAG, WP_TRANSPORT_TINY_USB } WP_Transport;
+#include <WireProtocol_Transport.h>
 
 // in UWP the COM ports are named COM1, COM2, COM3. But ESP32 uses internally UART0, UART1, UART2. This maps the port
 // index 1, 2 or 3 to the uart number 0, 1 or 2

targets/ESP32/_nanoCLR/targetHAL_Power.c

@@ -6,21 +6,24 @@
 #include <target_platform.h>
 #include <esp32_idf.h>
 #include <nanoHAL_v2.h>
+#include <WireProtocol_Transport.h>
 
 #if CONFIG_IDF_TARGET_ESP32C3
 #include <soc/rtc_cntl_reg.h>
 #endif
 
 inline void CPU_Reset()
 {
-#if CONFIG_IDF_TARGET_ESP32C3 && CONFIG_NF_WP_TRANSPORT_USB_CDC
-    SET_PERI_REG_MASK(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_SW_SYS_RST);
-    while (true)
+#if CONFIG_IDF_TARGET_ESP32C3
+    if (g_WP_Transport == WP_TRANSPORT_USB_JTAG)
     {
+        SET_PERI_REG_MASK(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_SW_SYS_RST);
+        while (true)
+        {
+        }
     }
-#else
-    esp_restart();
 #endif
+    esp_restart();
 };
 
 // CPU sleep is not currently implemented in this target

targets/ESP32/defconfig/ESP32_S2_defconfig

@@ -16,7 +16,7 @@ CONFIG_API_SYSTEM_IO_PORTS=y
 CONFIG_API_SYSTEM_MATH=y
 CONFIG_API_SYSTEM_NET=y
 # CONFIG_API_NANOFRAMEWORK_DEVICE_ONEWIRE is not set
-CONFIG_API_NANOFRAMEWORK_GRAPHICS=y
+# CONFIG_API_NANOFRAMEWORK_GRAPHICS is not set
 CONFIG_API_NANOFRAMEWORK_HARDWARE_ESP32_RMT=y
 CONFIG_API_NANOFRAMEWORK_RESOURCEMANAGER=y
 CONFIG_API_NANOFRAMEWORK_SYSTEM_COLLECTIONS=y
@@ -27,7 +27,7 @@ CONFIG_ESP32_ETHERNET_PHY_CLOCK_MODE=""
 CONFIG_ESP32_ETHERNET_PHY_POWER_PIN=""
 # CONFIG_ESP32_ETHERNET_SUPPORT is not set
 CONFIG_ESP32_RESERVE_SPIRAM_IDF_ALLOCATION_BYTES=1048576
-CONFIG_NF_WP_TRANSPORT_USB_CDC_OR_SERIAL=y
+CONFIG_NF_WP_TRANSPORT_USB_CDC=y
 CONFIG_GRAPHICS_DISPLAY_GENERIC_SPI=y
 CONFIG_GRAPHICS_IFACE_SPI=y
 # CONFIG_NF_BUILD_RTM is not set
@@ -44,5 +44,5 @@ CONFIG_SDK_CONFIG_FILE="sdkconfig.default.esp32s2"
 CONFIG_NF_SUPPORT_ANY_BASE_CONVERSION=y
 CONFIG_TARGET_BOARD="ESP32_S2"
 CONFIG_TARGET_SERIES="ESP32_S2"
-CONFIG_TOUCH_XPT2046=y
-CONFIG_TOUCH_IFACE_SPI=y
+# CONFIG_TOUCH_XPT2046 is not set
+# CONFIG_TOUCH_IFACE_SPI is not set