Fix u64 overflow in PWM frequency constraint check - #60
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(freq as u64) * arr_plus_one overflowed u64 silently for a large TOML i64 frequency_hz value (a debug-build panic, or a wrapped product that could wrongly pass the > timer_clk check in release), letting invalid PWM configs through with no diagnostic. Use checked_mul and treat an overflowing product as proof the frequency is unreachable.
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Fixes #50
Summary
clocks::validate's PWM timing reachability check computed(freq as u64) * arr_plus_onewith plain multiplication.freqcomes straight from TOML as ani64and can be arbitrarily large (e.g. a typo'd extra digit), so this multiplication could overflowu64— panicking in debug builds, or silently wrapping to a small value in release that could wrongly pass the> timer_clkcheck, letting an invalid PWM config through with no diagnostic.checked_mul, treating an overflowing product as proof the frequency is unreachable (it necessarily is, since the real product would dwarf any realistic timer clock).Test plan
huge_pwm_frequency_is_a_clock_constraint_not_a_panicwithfrequency_hz = 9000000000000000000.cargo test -p nucleus-compiler --lib— 148 passed.cargo clippy -p nucleus-compiler --all-targets -- -D warnings— clean.cargo fmt --all -- --check— clean.Generated by Claude Code