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aarch64: transport binary128 values through AAPCS64 - #800

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fix/72-aarch64-binary128
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davidgmbb wants to merge 13 commits into
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fix/72-aarch64-binary128

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@davidgmbb davidgmbb commented Sep 18, 2026

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Refs #72.

Scope

Promote the AArch64 binary128 transport prototype into production code for base AAPCS64 targets.

This PR now supports scalar IEEE binary128 (long double) transport through:

  • direct arguments and results in one Q register;
  • Q0/Q1 argument sequencing;
  • direct and indirect calls;
  • the aligned 16-byte stack image after V0-V7 are exhausted;
  • assignment, literal return, and negative-zero/payload preservation;
  • mixed Clang/Buster caller and callee objects on native Linux AArch64.

The implementation is slot-backed inside MIR and bridges the complete 16-byte image only at ABI boundaries. Canonical validation now defines the exact two-limb binary128 constant representation.

Deliberate exclusions

This is an independently useful prerequisite for #72, not full binary128 language support. Arithmetic, comparisons, truth conversion, unary operations other than constant sign toggling, general conversions, aggregates containing binary128, and variadic binary128 parameters retain their existing structured rejection. Issue #72 remains open.

Validation

  • non-unity Debug build with Clang: pass;
  • frontend tests: 596,823/596,823 assertions pass;
  • IR tests: 348,791/348,791 assertions pass;
  • machine-selection tests: 631/631 assertions pass;
  • machine tests: 517,169/517,169 assertions pass;
  • codegen tests: 7,011/7,011 assertions pass;
  • focused binary128 transport fixture: pass;
  • strict no-fallback matrix: 36/36 cells across Linux, Android and UEFI AArch64 targets, all three register allocators, both frontend forms, and PIC/non-PIC;
  • generated AArch64 object inspected for Q0/Q1 transport, indirect blr, and aligned ninth-argument stack spill;
  • full local suite reached 2,761,995 passing assertions; its five failures are unrelated Wasm64 runtime checks because the container's Node 22 build does not enable memory64.

@davidgmbb
davidgmbb force-pushed the fix/72-aarch64-binary128 branch from 9f3f7b4 to 2584698 Compare September 18, 2026 13:34
@davidgmbb davidgmbb closed this Sep 18, 2026
@davidgmbb
davidgmbb force-pushed the fix/72-aarch64-binary128 branch from 19d65d4 to b7a0f87 Compare September 18, 2026 22:43
@davidgmbb davidgmbb changed the title aarch64: prototype binary128 transport and lowering for #72 aarch64: transport binary128 values through AAPCS64 Sep 18, 2026
@davidgmbb davidgmbb reopened this Sep 18, 2026
@davidgmbb
davidgmbb marked this pull request as ready for review September 18, 2026 22:47
@davidgmbb
davidgmbb force-pushed the fix/72-aarch64-binary128 branch 2 times, most recently from 98a64bd to 984d8ed Compare September 18, 2026 22:53
@davidgmbb
davidgmbb force-pushed the fix/72-aarch64-binary128 branch from aedb3ca to 84dd534 Compare September 19, 2026 02:54
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