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1. my-RISC_V-MYTH-Workshop-VSD my-RISC_V-MYTH-Workshop-VSD Public

   RISC-V MYTH workshop by VSD (VLSI System Design) and Redwood EDA (RV32I and Tool-chain)

   TL-Verilog

2. Mini-Projects-CLVDnV_LinkedIn_Series Mini-Projects-CLVDnV_LinkedIn_Series Public

   my mini projects - VLSI Frontend Design and Verification.

   SystemVerilog

3. NIELT-eChiphub-coursework NIELT-eChiphub-coursework Public

4. VLSI-Workshop-APSSDC VLSI-Workshop-APSSDC Public

   VLSI Frontend workshop by APSSDC on IP Design & FPGA

   Verilog

5. my_markdown-repo my_markdown-repo Public

   markdown syntax.