GitHub - C-Elegans/altera_tx: An fpga I/Q modulator and radio transmitter exciter.

Name		Name	Last commit message	Last commit date
.gitignore		.gitignore
LICENSE		LICENSE
Makefile		Makefile
README.org		README.org
altera_tx.qpf		altera_tx.qpf
altera_tx.qsf		altera_tx.qsf
altera_tx.qsf.bak		altera_tx.qsf.bak
altera_tx.sby		altera_tx.sby
altera_tx.sdc		altera_tx.sdc
altera_tx.v		altera_tx.v
catch.hpp		catch.hpp
control_spi_tb.v		control_spi_tb.v
controller.sby		controller.sby
controller.v		controller.v
controller_tb.v		controller_tb.v
fifo.sby		fifo.sby
fifo.v		fifo.v
fpll.v		fpll.v
iq_mod.v		iq_mod.v
mult.v		mult.v
phase_accum.sby		phase_accum.sby
phase_accum.v		phase_accum.v
phase_accum_tb.v		phase_accum_tb.v
pll.ppf		pll.ppf
pll.qip		pll.qip
pll.v		pll.v
pll_bb.v		pll_bb.v
sampler.sby		sampler.sby
sampler.v		sampler.v
sin_table.v		sin_table.v
sins.hex		sins.hex
spi.sby		spi.sby
spi.v		spi.v
spi_tb.v		spi_tb.v
test_control_spi_tb.cpp		test_control_spi_tb.cpp
testbench.h		testbench.h

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#+TITLE: DE0 Nano I/Q transmitter
* Introduction
This project uses a DE0-Nano to perform the modulation for a DIY HF
radio transmitter. The DE0-Nano is fed I/Q samples at 10ks/s over SPI
and multiplies them with quadrature sine waves before summing them and
sending them to a high speed DAC. 

* Building
Compiling and running this project on an FPGA requires the use of the
Quartus II software, version 13.0 or higher. Select ~altera_tx.qpf~ in 
the 'Open Project' dialog, then click compile.

* Testing
** Verilog testbenches
   Verilog testbenches can be loaded into Modelsim-Altera and run
   there, or simulated via Icarus Verilog. Each module includes a
   comment at the top of the file that lists its dependencies for 
   simulation
** Verilator testbenches
   Before running these, please install verilator. Then type ~make~
   into the command line
** Formal Verification
   Formal verification requires installing:
   1. Yosys
   2. SymbiYosys
   3. Yices II

   After installing these packages, run ~make formal~ in the shell