From 62e013a9453aa130bc1a22dc6689b5800881b110 Mon Sep 17 00:00:00 2001 From: Jin Ma Date: Mon, 1 Apr 2024 14:15:56 +0800 Subject: [PATCH 1/2] Disabled to derive AB through default arch --- gcc/config/riscv/riscv.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/gcc/config/riscv/riscv.h b/gcc/config/riscv/riscv.h index 73725bc04164b..00fa766dd2e91 100644 --- a/gcc/config/riscv/riscv.h +++ b/gcc/config/riscv/riscv.h @@ -71,14 +71,14 @@ extern const char *riscv_get_arch_spec_path (int argc, const char **argv); {"tune", "%{!mtune=*:" \ " %{!mcpu=*:-mtune=%(VALUE)}" \ " %{mcpu=*:-mtune=%:riscv_default_mtune(%* %(VALUE))}}" }, \ - {"arch", "%{!march=*:" \ - " %{!mcpu=*:-march=%(VALUE)}" \ - " %{mcpu=*:%:riscv_expand_arch_from_cpu(%* %(VALUE))}}" }, \ {"abi", "%{!mabi=*:" \ " %{!march=*:" \ " %{!mcpu=*:-mabi=%(VALUE)}" \ " %{mcpu=*:%:riscv_expand_abi_from_cpu(%* %(VALUE))}}" \ - " %{march=*:%:riscv_expand_abi_from_arch(%*)}}" } + " %{march=*:%:riscv_expand_abi_from_arch(%*)}}" }, \ + {"arch", "%{!march=*:" \ + " %{!mcpu=*:-march=%(VALUE)}" \ + " %{mcpu=*:%:riscv_expand_arch_from_cpu(%* %(VALUE))}}" } #ifdef IN_LIBGCC2 #undef TARGET_64BIT From 7416baeeb3f0b993441baefd424cf0d3f26a34b0 Mon Sep 17 00:00:00 2001 From: Jiawei Date: Wed, 24 Apr 2024 18:58:50 +0800 Subject: [PATCH 2/2] RISC-V: Update 'zvamo' extension name. --- gcc/common/config/riscv/riscv-common.c | 12 ++---------- 1 file changed, 2 insertions(+), 10 deletions(-) diff --git a/gcc/common/config/riscv/riscv-common.c b/gcc/common/config/riscv/riscv-common.c index 17dc81c496af9..37c3bb0954920 100644 --- a/gcc/common/config/riscv/riscv-common.c +++ b/gcc/common/config/riscv/riscv-common.c @@ -163,8 +163,6 @@ static const struct riscv_ext_version riscv_ext_version_table[] = {"zifencei", ISA_SPEC_CLASS_20190608, 2, 0}, {"zfh", ISA_SPEC_CLASS_NONE, 1, 0}, - {"zvamo", ISA_SPEC_CLASS_NONE, 0, 7}, - {"zvlsseg", ISA_SPEC_CLASS_NONE, 0, 7}, {"zve32x", ISA_SPEC_CLASS_NONE, 1, 0}, {"zve32f", ISA_SPEC_CLASS_NONE, 1, 0}, @@ -190,8 +188,6 @@ static const struct riscv_ext_version riscv_ext_version_table[] = {"zvfbfwma", ISA_SPEC_CLASS_NONE, 0, 8}, {"zfa", ISA_SPEC_CLASS_NONE, 0, 1}, - {"zvamo", ISA_SPEC_CLASS_NONE, 1, 0}, - {"zvlsseg", ISA_SPEC_CLASS_NONE, 1, 0}, {"xtheadc", ISA_SPEC_CLASS_NONE, 2, 0}, {"xtheade", ISA_SPEC_CLASS_NONE, 2, 0}, @@ -942,12 +938,8 @@ riscv_subset_list::thead_specific_work () if ((implied_subset = lookup ("v", 0, 7))) { - if (!lookup ("zvamo")) - add ("zvamo", implied_subset->major_version, - implied_subset->minor_version, - implied_subset->explicit_version_p, false); - if (!lookup ("zvlsseg")) - add ("zvlsseg", implied_subset->major_version, + if (!lookup ("xtheadzvamo")) + add ("xtheadzvamo", implied_subset->major_version, implied_subset->minor_version, implied_subset->explicit_version_p, false); }