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I have checked the equivalence between two Verilog descriptions in benchmark ICCAD-2015, namely unit07/in_1.v and unit07/in_2.v, and it fails while partitioning.
Files, the eqy script and the result of its work in the attached archive.
I have checked the equivalence between two Verilog descriptions in benchmark ICCAD-2015, namely unit07/in_1.v and unit07/in_2.v, and it fails while partitioning.
Files, the eqy script and the result of its work in the attached archive.
for_eqy.zip