From 025695acf7c7769c1d0a67835b16aa75a435f7d2 Mon Sep 17 00:00:00 2001 From: Jason2866 Date: Wed, 20 May 2026 13:16:38 +0200 Subject: [PATCH 1/3] s31 stub support --- package-lock.json | 6 +++--- src/const.ts | 9 +++++++++ src/esp_loader.ts | 15 +++++++++++++-- src/stubs/esp32s31.json | 8 ++++++++ src/stubs/index.ts | 5 +++-- 5 files changed, 36 insertions(+), 7 deletions(-) create mode 100644 src/stubs/esp32s31.json diff --git a/package-lock.json b/package-lock.json index bb401665..9d46d49f 100644 --- a/package-lock.json +++ b/package-lock.json @@ -3424,9 +3424,9 @@ } }, "node_modules/brace-expansion": { - "version": "5.0.5", - "resolved": "https://registry.npmjs.org/brace-expansion/-/brace-expansion-5.0.5.tgz", - "integrity": "sha512-VZznLgtwhn+Mact9tfiwx64fA9erHH/MCXEUfB/0bX/6Fz6ny5EGTXYltMocqg4xFAQZtnO3DHWWXi8RiuN7cQ==", + "version": "5.0.6", + "resolved": "https://registry.npmjs.org/brace-expansion/-/brace-expansion-5.0.6.tgz", + "integrity": "sha512-kLpxurY4Z4r9sgMsyG0Z9uzsBlgiU/EFKhj/h91/8yHu0edo7XuixOIH3VcJ8kkxs6/jPzoI6U9Vj3WqbMQ94g==", "dev": true, "license": "MIT", "dependencies": { diff --git a/src/const.ts b/src/const.ts index 98bf7f63..a5e9603c 100644 --- a/src/const.ts +++ b/src/const.ts @@ -431,6 +431,15 @@ export const ESP32S31_SPI_MISO_DLEN_OFFS = 0x28; export const ESP32S31_SPI_W0_OFFS = 0x58; export const ESP32S31_UART_DATE_REG_ADDR = 0x2038a000 + 0x8c; export const ESP32S31_BOOTLOADER_FLASH_OFFSET = 0x2000; +// ESP32-S31 RTC Watchdog Timer registers (LP_WDT) +export const ESP32S31_DR_REG_LP_WDT_BASE = 0x20801000; +export const ESP32S31_RTC_CNTL_WDTCONFIG0_REG = + ESP32S31_DR_REG_LP_WDT_BASE + 0x0000; // LP_WDT_RWDT_CONFIG0_REG +export const ESP32S31_RTC_CNTL_WDTCONFIG1_REG = + ESP32S31_DR_REG_LP_WDT_BASE + 0x0004; // LP_WDT_RWDT_CONFIG1_REG +export const ESP32S31_RTC_CNTL_WDTWPROTECT_REG = + ESP32S31_DR_REG_LP_WDT_BASE + 0x0018; // LP_WDT_RWDT_WPROTECT_REG +export const ESP32S31_RTC_CNTL_WDT_WKEY = 0x50d83aa1; export interface SpiFlashAddresses { regBase: number; diff --git a/src/esp_loader.ts b/src/esp_loader.ts index 759c4da2..d18d6026 100644 --- a/src/esp_loader.ts +++ b/src/esp_loader.ts @@ -69,6 +69,10 @@ import { ESP32H2_EFUSE_BLOCK1_ADDR, ESP32P4_EFUSE_BLOCK1_ADDR, ESP32S31_EFUSE_BLOCK1_ADDR, + ESP32S31_RTC_CNTL_WDTWPROTECT_REG, + ESP32S31_RTC_CNTL_WDTCONFIG0_REG, + ESP32S31_RTC_CNTL_WDTCONFIG1_REG, + ESP32S31_RTC_CNTL_WDT_WKEY, SlipReadError, ESP32S2_RTC_CNTL_WDTWPROTECT_REG, ESP32S2_RTC_CNTL_WDTCONFIG0_REG, @@ -1640,6 +1644,12 @@ export class ESPLoader extends EventTarget { WDTCONFIG0_REG = ESP32P4_RTC_CNTL_WDTCONFIG0_REG; WDTCONFIG1_REG = ESP32P4_RTC_CNTL_WDTCONFIG1_REG; WDT_WKEY = ESP32P4_RTC_CNTL_WDT_WKEY; + } else if (this.chipFamily === CHIP_FAMILY_ESP32S31) { + // S31 uses LP_WDT (Low Power Watchdog Timer) + WDTWPROTECT_REG = ESP32S31_RTC_CNTL_WDTWPROTECT_REG; + WDTCONFIG0_REG = ESP32S31_RTC_CNTL_WDTCONFIG0_REG; + WDTCONFIG1_REG = ESP32S31_RTC_CNTL_WDTCONFIG1_REG; + WDT_WKEY = ESP32S31_RTC_CNTL_WDT_WKEY; } else { throw new Error( `rtcWdtResetChipSpecific() is not supported for ${this.chipFamily}`, @@ -1700,12 +1710,13 @@ export class ESPLoader extends EventTarget { // Check if chip supports WDT reset // WDT reset is not needed for ESP32-C3 - // WDT reset is supported by: ESP32-S2, ESP32-S3, ESP32-P4 + // WDT reset is supported by: ESP32-S2, ESP32-S3, ESP32-P4, ESP32-S31 // WDT reset is NOT supported by: ESP32-C5, ESP32-C6, ESP32-C61, ESP32-H2 const supportsWdtReset = this.chipFamily === CHIP_FAMILY_ESP32S2 || this.chipFamily === CHIP_FAMILY_ESP32S3 || - this.chipFamily === CHIP_FAMILY_ESP32P4; + this.chipFamily === CHIP_FAMILY_ESP32P4 || + this.chipFamily === CHIP_FAMILY_ESP32S31; if (!supportsWdtReset) { this.logger.debug( diff --git a/src/stubs/esp32s31.json b/src/stubs/esp32s31.json new file mode 100644 index 00000000..3c192f1b --- /dev/null +++ b/src/stubs/esp32s31.json @@ -0,0 +1,8 @@ +{ + "entry": 788533248, + "text": "ARG3pwAvN9cBLwbOIswmykrIk4cHABMHR9tj6ucE7wCQaRMH9f+FRyqEY+TnAO8QQEABRe8AMHqBRQFF7wBQcyKF7wCwaLdXQUmTh/eEkUUoAD7EhUTBKAlJJSxjHZUAaABhJLJF7wBQDX0s/bcjoAcAkQddt+MKJf/jEJT+7xCAN2Hd7xAAOMm/CcW31wEvI6qn2oKAt6cALyOgpwCCgLfXAS+Dp0fbEwUADIKHQREixDfUAS8TBETbBsaTBgAMHEBjCtUAkwawDWMN1QAiRLJAQQGChxMFsA2Cl", + "text_start": 788533248, + "data": "ECIAL0wiAS+OEwAvjhMAL44TAC+OEwAvjhMAL44TAC+OEwAvjhMAL44TAC+OEwAvjhMAL44TAC+OEwAvjhMAL44TAC+OEwAvjhMAL44TAC+OEwAvjhMAL44TAC+qGgAvthoALwIbAC8uGwAvuBsAL2IbAC+MGgAv+hsAL3YcAC+cHAAvQhoAL4ocAC9CGgAvAh0ALxIdAC8WHQAvAhsAL24dAC+CHQAv", + "data_start": 788647348, + "bss_start": 788570112 +} \ No newline at end of file diff --git a/src/stubs/index.ts b/src/stubs/index.ts index 43315c1f..e0a67e62 100644 --- a/src/stubs/index.ts +++ b/src/stubs/index.ts @@ -42,8 +42,7 @@ export const getStubCode = async ( // Chips without stub support yet if ( chipFamily == CHIP_FAMILY_ESP32H4 || - chipFamily == CHIP_FAMILY_ESP32H21 || - chipFamily == CHIP_FAMILY_ESP32S31 + chipFamily == CHIP_FAMILY_ESP32H21 ) { return null; } @@ -75,6 +74,8 @@ export const getStubCode = async ( } else { stubcode = await import("./esp32p4.json"); } + } else if (chipFamily == CHIP_FAMILY_ESP32S31) { + stubcode = await import("./esp32s31.json"); } else { // Unknown chip family - no stub available return null; From 34adcdde9f903416c9c44fa5c3f2e18a370c03ef Mon Sep 17 00:00:00 2001 From: Jason2866 Date: Wed, 20 May 2026 16:28:52 +0200 Subject: [PATCH 2/3] fis s31 reg addr --- src/const.ts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/const.ts b/src/const.ts index a5e9603c..bed8130f 100644 --- a/src/const.ts +++ b/src/const.ts @@ -419,7 +419,7 @@ export const ESP32P4_PMU_0P1A_TARGET0_0 = 0xff << 23; export const ESP32P4_PMU_0P1A_FORCE_TIEH_SEL_0 = 1 << 7; export const ESP32P4_PMU_DATE_REG = ESP32P4_DR_REG_PMU_BASE + 0x3fc; -export const ESP32S31_SPI_REG_BASE = 0x20500000; +export const ESP32S31_SPI_REG_BASE = 0x20501000; export const ESP32S31_BASEFUSEADDR = 0x20715000; export const ESP32S31_EFUSE_BLOCK1_ADDR = ESP32S31_BASEFUSEADDR + 0x044; export const ESP32S31_MACFUSEADDR = 0x20715000 + 0x044; From aa96339c9f41949a5c3b7ab5d4c42634cc6a41dc Mon Sep 17 00:00:00 2001 From: Jason2866 Date: Wed, 20 May 2026 16:33:03 +0200 Subject: [PATCH 3/3] fix s31 reg addr --- src/const.ts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/const.ts b/src/const.ts index bed8130f..9b522411 100644 --- a/src/const.ts +++ b/src/const.ts @@ -421,8 +421,8 @@ export const ESP32P4_PMU_DATE_REG = ESP32P4_DR_REG_PMU_BASE + 0x3fc; export const ESP32S31_SPI_REG_BASE = 0x20501000; export const ESP32S31_BASEFUSEADDR = 0x20715000; -export const ESP32S31_EFUSE_BLOCK1_ADDR = ESP32S31_BASEFUSEADDR + 0x044; -export const ESP32S31_MACFUSEADDR = 0x20715000 + 0x044; +export const ESP32S31_EFUSE_BLOCK1_ADDR = ESP32S31_BASEFUSEADDR + 0x050; +export const ESP32S31_MACFUSEADDR = ESP32S31_BASEFUSEADDR + 0x050; export const ESP32S31_SPI_USR_OFFS = 0x18; export const ESP32S31_SPI_USR1_OFFS = 0x1c; export const ESP32S31_SPI_USR2_OFFS = 0x20;